LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1231
LFEBS12UB
Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Specifications of LFEBS12UB
Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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A.3.1.20
The maximum time a CCOB command has to wait to be actioned due to an EEE clean up is given where
BWN = 1 if a brownout has occured otherwise BWN = 0. BWN = 1 only for the first ENEEE after reset.
A.3.1.21
Maximum time to disable EPROM emulation is given by
A.3.1.22
Maximum time for the EEE query command is given by
A.3.1.23
The maximum time for partitioning the D-flash (ERPART=16, DFPART=0) is given by
Freescale Semiconductor
t
t
t 21800
=
=
≈
300
300
t
+
≈
BWN
⎛
⎝
⋅
⋅
32364
---------------------------- -
f NVMBUS
---------------------------- -
f
NVMBUS
⋅
Maximum CCOB Latency
Disable EEE (FCMD=0x14)
EEE Query (FCMD=0x15)
Partition D-Flash (FCMD=0x20)
------------------------ -
f NVMOP
⋅
1
1
⋅
⎛
⎝
1
------------------------ -
f NVMOP
350
1
⋅
+
-------------------- -
f NVMOP
400000
+
1
MC9S12XE-Family Reference Manual Rev. 1.23
292600
⋅
---------------------------- -
f
+
NVMBUS
------------------------ -
f NVMBUS
⋅
---------------------------- -
f
1
1100
NVMBUS
1
⎞
⎠
⎞
⎠
⋅
(
1
+
BWN
)
Appendix A Electrical Characteristics
1231
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