LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 240

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.10
Read: Anytime
Write: Anytime
4.3.1.11
Read: Anytime
Write: Anytime
240
Address: Module Base + 0x000A
Address: Module Base + 0x000B
HIGH_ADDR[
HIGH_ADDR[
HIGH_ADDR[
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
22:19]
18:11]
Field
Field
Field
10:3]
NEX
3–0
7–0
7–0
6
W
W
R
R
MPU Descriptor Register 4 (MPUDESC4)
MPU Descriptor Register 5 (MPUDESC5)
No-Execute bit — The NEX bit prevents the described memory range from being used as code memory. If this
bit is set every Op-code fetch in this memory range causes an access violation.
Memory range upper boundary address bits — The HIGH_ADDR[22:19] bits represent bits [22:19] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[18:11] bits represent bits [18:11] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[10:3] bits represent bits [10:3] of the
global memory address that is used as the upper boundary for the described memory range.
1
1
7
7
1
1
6
6
Figure 4-12. MPU Descriptor Register 4 (MPUDESC4)
Figure 4-13. MPU Descriptor Register 5 (MPUDESC5)
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 4-12. MPUDESC4 Field Descriptions
Table 4-13. MPUDESC5 Field Descriptions
5
1
5
1
HIGH_ADDR[18:11]
HIGH_ADDR[10:3]
1
1
4
4
Description
Description
Description
1
1
3
3
2
1
2
1
Freescale Semiconductor
1
1
1
1
1
1
0
0