LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 735

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.3.2.5
Read: Anytime, if AMAP = 1
Write: Anytime, if AMAP = 1
Freescale Semiconductor
Module Base + 0x0002
BERRM[1:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
BKDFE
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
2:1
0
W
R
BERRM1
Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See
Break Detect Feature Enable — BKDFE enables the break detect circuitry.
0 Break detect circuit disabled
1 Break detect circuit enabled
0
0
1
1
SCI Alternative Control Register 2 (SCIACR2)
0
0
7
= Unimplemented or Reserved
BERRM0
Figure 20-8. SCI Alternative Control Register 2 (SCIACR2)
0
1
0
1
0
0
6
Bit error detect circuit is disabled
Receive input sampling occurs during the 9th time tick of a transmitted bit
(refer to
Receive input sampling occurs during the 13th time tick of a transmitted bit
(refer to
Reserved
MC9S12XE-Family Reference Manual Rev. 1.23
Table 20-8. SCIACR2 Field Descriptions
Table 20-9. Bit Error Mode Coding
5
0
0
Figure
Figure
20-19)
20-19)
0
0
4
Description
Function
Chapter 20 Serial Communication Interface (S12SCIV5)
0
0
3
BERRM1
2
0
BERRM0
0
1
Table
BKDFE
20-9.
0
0
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