LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1257

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1
2
3
Freescale Semiconductor
No.
10
11
12
Typical Supply and Silicon, Room Temperature Only
Includes also ACCx, IQSTATx
Includes LSTRB
1
2
3
4
5
6
7
8
9
-
Table A-33. Example 2b: Emulation Expanded Mode Timing 50 MHz bus, V
C
D
D
D
D
D
D
D
D
D
D
D
-
-
Internal cycle time
Cycle time
Pulse width, E high
E falling to sampling E rising
Address delay time
Address hold time
IVD delay time
IVD hold time
Read data setup time
Read data hold time
Write data delay time
Write data hold time
Read/write data delay time
Characteristic
2
MC9S12XE-Family Reference Manual Rev. 1.23
3
1
Symbol
PW
t
t
t
t
t
t
t
t
t
EFSR
IVDD
IVDH
DDW
DHW
RWD
t
DHR
cyce
t
t
DSR
cyc
AD
AH
EH
refer to table
Min
Table A-32
20
40
28
1 stretch
9
cycle
Max
11
32
refer to table
Min
Table A-32
20
60
48
2 stretch
9
Appendix A Electrical Characteristics
cycles
DD5
=5.0V (EWAIT disabled)
Max
11
52
refer to table
Min
Table A-32
20
80
68
3 stretch
9
cycles
Max
11
72
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1257

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