LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 800

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 22 Timer Module (TIM16B8CV2) Block Description
22.3.2.7
Read: Anytime
Write: Anytime
800
Module Base + 0x0007
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
TOV[7:0]
TFFCA
Reset
PRNT
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
7:0
4
3
W
R
TOV7
Timer Fast Flag Clear All
0 Allows the timer flag clearing to function normally.
1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010–0x001F)
Precision Timer
0 Enables legacy timer. PR0, PR1, and PR2 bits of the TSCR2 register are used for timer counter prescaler
1 Enables precision timer. All bits of the PTPSR register are used for Precision Timer Prescaler Selection, and
This bit is writable only once out of reset.
Toggle On Overflow Bits — TOVx toggles output compare pin on overflow. This feature only takes effect when
in output compare mode. When set, it takes precedence over forced output compare but not channel 7 override
events.
0 Toggle output compare pin on overflow feature disabled.
1 Toggle output compare pin on overflow feature enabled.
Timer Toggle On Overflow Register 1 (TTOV)
0
7
causes the corresponding channel flag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT
register (0x0004, 0x0005) clears the TOF flag. Any access to the PACNT registers (0x0022, 0x0023) clears
the PAOVF and PAIF flags in the PAFLG register (0x0021). This has the advantage of eliminating software
overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to
unintended accesses.
selection.
all bits.
Figure 22-13. Timer Toggle On Overflow Register 1 (TTOV)
TOV6
0
6
Table 22-6. TSCR1 Field Descriptions (continued)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-7. TTOV Field Descriptions
TOV5
5
0
TOV4
0
4
Description
Description
TOV3
0
3
TOV2
2
0
Freescale Semiconductor
TOV1
0
1
TOV0
0
0