LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 456

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 10 XGATE (S12XGATEV3)
SUBH
Operation
RD – IMM8:$00 ⇒ RD
Subtracts a signed immediate 8 bit constant from the content of high byte of register RD and using binary
subtraction and stores the result in the high byte of destination register RD. This instruction can be used
after an SUBL for a 16 bit immediate subtraction.
Example:
CCR Effects
Code and CPU Cycles
456
N:
Z:
V:
C:
SUBH RD, #IMM8
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
SUBL
SUBH
old
old
V
Source Form
& IMM8[7] & RD[15]
& IMM8[7] | RD[15]
C
R2,#LOWBYTE
R2,#HIGHBYTE
old
new
MC9S12XE-Family Reference Manual , Rev. 1.23
& RD[15]
Subtract Immediate 8 bit Constant
| RD[15]
Address
Mode
IMM8
new
; R2 = R2 - 16 bit immediate
old
& IMM8[7] & RD[15]
| IMM8[7] & RD[15]
(High Byte)
1
1
0
0
new
1
new
Machine Code
RD
IMM8
SUBH
Freescale Semiconductor
Cycles
P

Related parts for LFEBS12UB