LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 369

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10.3.1.9
The eight software triggers of the XGATE module can be set and cleared through the XGATE Software
Trigger Register
write access to the lower byte, the software trigger bits. These bits can be set or cleared if a "1" is written
to the associated mask in the same bus cycle. Refer to
further information.
Module Base +0x00018
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
15
0
0
XGATE Software Trigger Register (XGSWT)
14
0
0
Suggested Mnemonics for accessing the interrupt flag vector on a word
basis are:
(Figure
XGIF_7F_70 (XGIF[127:112]),
XGIF_6F_60 (XGIF[111:96]),
XGIF_5F_50 (XGIF[95:80]),
XGIF_4F_40 (XGIF[79:64]),
XGIF_3F_30 (XGIF[63:48]),
XGIF_2F_20 (XGIF[47:32]),
XGIF_1F_10 (XGIF[31:16]),
XGIF_0F_00 (XGIF[15:0])
13
0
0
Figure 10-11. XGATE Software Trigger Register (XGSWT)
XGSWTM[7:0]
10-11). The upper byte of this register, the software trigger mask, controls the
12
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
11
0
0
10
0
0
0
0
9
NOTE
0
0
8
Section 10.5.2, “Outgoing Interrupt
0
7
6
0
0
5
XGSWT[7:0]
0
4
Chapter 10 XGATE (S12XGATEV3)
0
3
0
2
Requests”
1
0
for
0
0
369

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