LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 502

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 12 Pierce Oscillator (S12XOSCLCPV2)

This section lists and describes the signals that connect off chip

Theses pins provides operating voltage (V

allows the supply voltage to the XOSC to use an independent bypass capacitor.

These pins provide the interface for either a crystal or a 1.8V CMOS compatible clock to control the

internal clock generator circuitry. EXTAL is the external clock input or the input to the crystal oscillator

ampliﬁer. XTAL is the output of the crystal oscillator ampliﬁer. The MCU internal system clock is derived

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

External Signal Description

Block Diagram

VDDPLL and VSSPLL — Operating and Ground Voltage Pins

EXTAL and XTAL — Input and Output Pins

shows a block diagram of the XOSC.

MC9S12XE-Family Reference Manual , Rev. 1.23

Figure 12-1. XOSC Block Diagram

Gain Control

) and ground (V

Monitor_Failure

) for the XOSC circuitry. This

Freescale Semiconductor