MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 481

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.3.2
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Writes to a reserved register locations do not have any effect
and reads of these locations return a zero. Details of register bit and field function follow the register
diagrams, in bit order.
1
2
Freescale Semiconductor
1.These registers are accessible if the AMAP bit in the SCISR2 register is set to zero.
2,These registers are accessible if the AMAP bit in the SCISR2 register is set to one.
Those registers are accessible if the AMAP bit in the SCISR2 register is set to zero
Those registers are accessible if the AMAP bit in the SCISR2 register is set to one
SCIASR1
SCIACR1
SCIACR2
SCIBDH
SCIBDL
SCICR1
Register
SCIDRH
SCICR2
SCIDRL
SCISR1
SCISR2
Name
1
1
1
2
2
2
Register Descriptions
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
RXEDGIE
RXEDGIF
LOOPS
AMAP
TDRE
SBR7
IREN
Bit 7
TIE
R8
R7
T7
0
= Unimplemented or Reserved
SCISWAI
TNP1
SBR6
TCIE
TC
R6
T8
T6
6
0
0
0
0
Figure 11-2. SCI Register Summary
MC9S12XDP512 Data Sheet, Rev. 2.21
RSRC
RDRF
SBR5
TNP0
RIE
R5
T5
5
0
0
0
0
0
TXPOL
SBR12
SBR4
IDLE
ILIE
R4
T4
M
4
0
0
0
0
Chapter 11 Serial Communication Interface (S12SCIV5)
RXPOL
SBR11
WAKE
SBR3
OR
TE
R3
T3
3
0
0
0
0
BERRM1
BERRV
SBR10
BRK13
SBR2
ILT
RE
NF
R2
T2
2
0
0
BERRM0
BERRIF
BERRIE
TXDIR
SBR9
SBR1
RWU
PE
FE
R1
T1
1
0
BKDFE
BKDIE
BKDIF
SBR8
SBR0
Bit 0
SBK
RAF
PT
PF
R0
T0
0
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