MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 551

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.4
Figure 13-19
control and data registers, two 8-bit down-counters, four 16-bit down-counters and an interrupt/trigger
interface.
13.4.1
As shown in
16-bit modulus down-counters and two 8-bit modulus down-counters. The 16-bit timers are clocked with
two selectable micro time bases which are generated with 8-bit modulus down-counters. Each 16-bit timer
is connected to micro time base 0 or 1 via the PMUX[3:0] bit setting in the PIT Multiplex (PITMUX)
register.
A timer channel is enabled if the module enable bit PITE in the PIT control and force load micro timer
(PITCFLMT) register is set and if the corresponding PCE bit in the PIT channel enable (PITCE) register
is set. Two 8-bit modulus down-counters are used to generate two micro time bases. As soon as a micro
time base is selected for an enabled timer channel, the corresponding micro timer modulus down-counter
will load its start value as specified in the PITMTLD0 or PITMTLD1 register and will start down-counting.
Whenever the micro timer down-counter has counted to zero the PITMTLD register is reloaded and the
connected 16-bit modulus down-counters count one cycle.
Freescale Semiconductor
Bus
Clock
Functional Description
PFLMT
[0]
[1]
Timer
Figure
shows a detailed block diagram of the PIT module. The main parts of the PIT are status,
PITCFLMT Register
PITFLT Register
PITMUX Register
PITMLD0 Register
8-Bit Micro Timer 0
PITMLD1 Register
8-Bit Micro Timer 1
13-1and
Figure
PMUX3
Figure 13-19. PIT Detailed Block Diagram
4
4
MC9S12XDP512 Data Sheet, Rev. 2.21
13-19, the 24-bit timers are built in a two-stage architecture with four
PMUX0
PFLT0
PFLT2
PFLT1
PFLT3
[1]
[2]
Timer 0
Timer 1
Timer 2
Timer 3
PITLD0 Register
PITCNT0 Register
PITLD1 Register
PITCNT1 Register
PITLD2 Register
PITCNT2 Register
PITLD3 Register
PITCNT3 Register
Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)
Time-Out 3
time-
out 1
time-
out 2
time-out 0
PIT_24B4C
PITTF Register
PITINTE Register
Interrupt /
Trigger Interface
Hardware
Trigger
Interrupt
Request
4
4
551

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