DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 118

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 4 Exception Handling
4.2
4.2.1
A reset has the highest exception priority.
When the RES pin goes low, all processing halts and the H8S/2345 Group enters the reset state. A
reset initializes the internal state of the CPU and the registers of on-chip supporting modules.
Immediately after a reset, interrupt control mode 0 is set.
Reset exception handling begins when the RES pin changes from low to high.
The level of the NMI pin at reset determines whether the type of reset is a power-on reset or a
manual reset.
The H8S/2345 Group can also be reset by overflow of the watchdog timer. For details see section
11, Watchdog Timer.
4.2.2
A reset can be of either of two types: a power-on reset or a manual reset. Reset types are shown in
table 4.3. A power-on reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes
all the registers in the on-chip supporting modules, while a manual reset initializes all the registers
in the on-chip supporting modules except for the bus controller and I/O ports, which retain their
previous states.
With a manual reset, since the on-chip supporting modules are initialized, ports used as on-chip
supporting module I/O pins are switched to I/O ports controlled by DDR and DR.
Table 4.3
Type
Power-on reset
Manual reset
A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a
manual reset.
Rev. 4.00 Feb 15, 2006 page 92 of 900
REJ09B0291-0400
Reset
Overview
Reset Types
Reset Types
NMI
High
Low
Reset Transition
Conditions
RES
RES
Low
Low
RES
RES
CPU
Initialized
Initialized
On-Chip Supporting Modules
Initialized
Initialized, except for bus controller
and I/O ports
Internal State