DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 862

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
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Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Appendix B Internal I/O Register
TCSR—Timer Control/Status Register
Bit
Initial value
Read/Write
Rev. 4.00 Feb 15, 2006 page 836 of 900
REJ09B0291-0400
The method for writing to TCSR is different from that for general registers to prevent inadvertent overwriting.
For details see section 11.2.4, Notes on Register Access.
Note: * Can only be written with 0 for flag clearing.
:
:
:
Overflow Flag
R/(W)*
OVF
0
1
7
0
[Clearing condition]
Cleared by reading TCSR when OVF = 1, then writing 0 to OVF
[Setting condition]
Set when TCNT overflows from H'FF to H'00 in interval timer mode
Timer Mode Select
WT/IT
R/W
0
1
6
0
Interval timer mode: Sends the CPU an interval timer interrupt request
(WOVI) when TCNT overflows
Watchdog timer mode: Generates the WDTOVF signal when
TCNT overflows
Timer Enable
TME
R/W
0
1
5
0
TCNT is initialized to H'00 and halted
TCNT counts
4
1
Note: *
CKS2 CKS1 CKS0
Clock Select
3
1
0
1
H'FFBC (W) H'FFBC (R)
0
1
0
1
The overflow period is the time from when TCNT
starts counting up from H'00 until overflow occurs.
CKS2
R/W
2
0
0
1
0
1
0
1
0
1
/2 (initial value)
/64
/128
/512
/2048
/8192
/32768
/131072
CKS1
R/W
Clock
1
0
CKS0
R/W
0
0
(when
25.6µs
819.2µs
1.6ms
6.6ms
26.2ms
104.9ms
419.4ms
1.68s
Overflow period *
= 20 MHz)
WDT

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