DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 28

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 1 Overview
Table 1.1
Item
CPU
Bus controller
Data transfer
controller (DTC)
Rev. 4.00 Feb 15, 2006 page 2 of 900
REJ09B0291-0400
Overview
Specification
General-register machine
High-speed operation suitable for realtime control
Instruction set suitable for high-speed operation
Two CPU operating modes
Address space divided into 8 areas, with bus specifications settable
independently for each area
Chip select output possible for areas 0 to 3
Choice of 8-bit or 16-bit access space for each area
2-state or 3-state access space can be designated for each area
Number of program wait states can be set for each area
Burst ROM directly connectable
External bus release function
Can be activated by internal interrupt or software
Multiple transfers or multiple types of transfer possible for one activation
source
Transfer is possible in repeat mode, block transfer mode, etc.
Request can be sent to CPU for interrupt that activated DTC
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers
or eight 32-bit registers)
Maximum clock rate: 20 MHz
High-speed arithmetic operations
8/16/32-bit register-register add/subtract : 50 ns
16
32 ÷ 16-bit register-register divide
Sixty-five basic instructions
8/16/32-bit move/arithmetic and logic instructions
Unsigned/signed multiply and divide instructions
Powerful bit-manipulation instructions
Normal mode: 64-kbyte address space (ZTAT, mask ROM, and
ROMless versions only)
Advanced mode: 16-Mbyte address space
16-bit register-register multiply
: 1000 ns
: 1000 ns