DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 336

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 9 16-Bit Timer Pulse Unit (TPU)
9.2.4
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has six TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
0
1
Bit 6—Reserved: Read-only bit, always read as 1.
Rev. 4.00 Feb 15, 2006 page 310 of 900
REJ09B0291-0400
Channel 0: TIER0
Channel 3: TIER3
Bit
Initial value
R/W
Channel 1: TIER1
Channel 2: TIER2
Channel 4: TIER4
Channel 5: TIER5
Bit
Initial value
R/W
Timer Interrupt Enable Register (TIER)
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
:
:
:
:
:
:
TTGE
TTGE
R/W
R/W
7
0
7
0
—
—
—
—
6
1
6
1
TCIEU
R/W
—
—
5
0
5
0
TCIEV
TCIEV
R/W
R/W
4
0
4
0
TGIED
R/W
—
—
3
0
3
0
TGIEC
R/W
—
—
2
0
2
0
TGIEB
TGIEB
R/W
R/W
1
0
1
0
(Initial value)
TGIEA
TGIEA
R/W
R/W
0
0
0
0