DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 871

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

TIOR0H—Timer I/O Control Register 0H
Bit
Initial value
Read/Write
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000, and /1 is used as the TCNT1 count clock, this setting is invalid and
TGR0B I/O Control
0
1
0
1
0
1
:
:
:
input capture is not generated.
0
1
0
1
0
1
*
IOB3
R/W
7
0
0
1
0
1
0
1
0
1
0
1
*
*
TGR0B
is output
compare
register
TGR0B
is input
compare
register
IOB2
R/W
6
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is
0 output
Capture input
source is
TIOCB0 pin
Capture input
source is channel
1/count clock
IOB1
R/W
5
0
IOB0
R/W
4
0
TGR0A I/O Control
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
0
1
0
1
0
1
IOA3
R/W
3
0
0
1
0
1
0
1
*
*
1
0
1
0
1
0
1
0
1
0
1
*
*
IOA2
R/W
TGR0A
is output
compare
register
TGR0A
is input
capture
register
2
0
H'FFD2
*: Don’t care
Rev. 4.00 Feb 15, 2006 page 845 of 900
IOA1
R/W
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCA0 pin
Capture input
source is channel
1/count clock
1
0
Appendix B Internal I/O Register
IOA0
R/W
0
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
REJ09B0291-0400
*: Don’t care
TPU0