DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 245

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Port 2 Data Register (P2DR)
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P2
P2DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port 2 Register (PORT2)
PORT2 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 2 pins (P2
If a port 2 read is performed while P2DDR bits are set to 1, the P2DR values are read. If a port 2
read is performed while P2DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT2 contents are determined by the pin
states, as P2DDR and P2DR are initialized. PORT2 retains its prior state after a manual reset, and
in software standby mode.
Bit
Initial value
R/W
Note: * Determined by state of pins P2
Bit
Initial value
R/W
:
:
:
:
:
:
P27
P27DR
—*
R
7
R/W
7
0
P26
—*
P26DR
R
6
R/W
6
0
7
to P2
P25
—*
P25DR
0
) must always be performed on P2DR.
R
5
7
R/W
to P2
5
0
0
.
P24
—*
P24DR
R
4
R/W
4
0
Rev. 4.00 Feb 15, 2006 page 219 of 900
P23
—*
P23DR
R
3
R/W
3
0
P22
—*
P22DR
R
2
R/W
2
0
Section 8 I/O Ports
P21
REJ09B0291-0400
—*
P21DR
R
1
R/W
1
0
7
to P2
P20
P20DR
—*
R
0
R/W
0
0
0
).