DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 575

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
17.5
17.5.1
Table 17.6 shows how to select the program, verify, and program-inhibit modes in PROM mode.
Table 17.6 Mode Selection in PROM Mode
Legend:
L:
H:
V
V
Programming and verification should be carried out using the same specifications as for the
standard HN27C101 EPROM.
However, do not set the PROM programmer to page mode, as the H8S/2345 does not support page
programming. A PROM programmer that only supports page programming cannot be used. When
choosing a PROM programmer, check that it supports high-speed programming in byte units.
Always set addresses within the range H'00000 to H'1FFFF.
17.5.2
An efficient, high-speed programming procedure can be used to program and verify PROM data.
This procedure writes data quickly without subjecting the chip to voltage stress or sacrificing data
reliability. It leaves the data H'FF in unused addresses. Figure 17.4 shows the basic high-speed
programming flowchart. Tables 17.7 and 17.8 list the electrical characteristics of the chip during
programming. Figure 17.5 shows a timing chart.
Mode
Program
Verify
Program-inhibit
PP
CC
: V
: V
Low voltage level
High voltage level
PP
CC
voltage level
voltage level
Programming
Overview
Programming and Verification
CE
CE
CE
CE
L
L
L
L
H
H
OE
OE
OE
OE
H
L
L
H
L
H
PGM
PGM V
PGM
PGM
L
H
L
H
L
H
V
V
V
PP
PP
PP
PP
V
V
V
V
CC
CC
CC
CC
Rev. 4.00 Feb 15, 2006 page 549 of 900
Pins
EO
Data input
Data output
High impedance
7
to EO
0
REJ09B0291-0400
Section 17 ROM
EA
Address input
Address input
Address input
16
to EA
0

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