DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 642

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 18 Clock Pulse Generator
18.1.2
The clock pulse generator is controlled by SCKCR. Table 18.1 shows the register configuration.
Table 18.1 Clock Pulse Generator Register
Name
System clock control register
Note:
18.2
18.2.1
SCKCR is an 8-bit readable/writable register that performs clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7— Clock Output Disable (PSTOP): Controls output.
Bit 7
PSTOP
0
1
Bit 6—Reserved: This bit can be read or written to, but only 0 should be written.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Rev. 4.00 Feb 15, 2006 page 616 of 900
REJ09B0291-0400
Bit
Initial value
R/W
* Lower 16 bits of the address.
Register Configuration
Register Descriptions
System Clock Control Register (SCKCR)
Normal Operation
Fixed high
:
:
:
output (initial value)
PSTOP
R/W
7
0
R/W
6
0
Abbreviation
SCKCR
Sleep Mode
Fixed high
output
5
0
Description
4
0
R/W
R/W
Software
Standby Mode
Fixed high
Fixed high
3
0
H'00
Initial Value
SCK2
R/W
2
0
SCK1
Hardware
Standby Mode
High impedance
High impedance
R/W
1
0
H'FF3A
Address *
SCK0
R/W
0
0

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