DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 493

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
[3]
No
No
Read receive data in RDR, and
Clear ORER flag in SSR to 0
clear RDRF flag in SSR to 0
Overrun error processing
Read ORER flag in SSR
Read RDRF flag in SSR
Clear RE bit in SCR to 0
All data received?
Error processing
Start reception
Initialization
Figure 12.18 Sample Serial Reception Flowchart
ORER = 1
RDRF = 1
<End>
<End>
Yes
Yes
No
(Continued below)
Error processing
Yes
Section 12 Serial Communication Interface (SCI)
[2]
[1]
[3]
[4]
[5]
Rev. 4.00 Feb 15, 2006 page 467 of 900
[1]
[2] [3]
[4]
[5]
The RxD pin is automatically
designated as the receive data
input pin.
If a receive error occurs, read the
ORER flag in SSR, and after
performing the appropriate error
processing, clear the ORER flag
to 0. Transfer cannot be resumed
if the ORER flag is set to 1.
SCI status check and receive
data read:
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
clear the RDRF flag to 0.
Transition of the RDRF flag from
0 to 1 can also be identified by
an RXI interrupt.
Serial reception continuation
procedure:
To continue serial reception,
before the MSB (bit 7) of the
current frame is received, finish
reading the RDRF flag, reading
RDR, and clearing the RDRF flag
to 0. The RDRF flag is cleared
automatically when the DTC is
activated by a receive data full
interrupt (RXI) request and the
RDR value is read.
SCI initialization:
Receive error processing:
REJ09B0291-0400

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