DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 49

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.1.3
In comparison to the H8/300 CPU, the H8S/2000 CPU has the following enhancements.
2.1.4
In comparison to the H8/300H CPU, the H8S/2000 CPU has the following enhancements.
More general registers and control registers
Expanded address space
Enhanced addressing
Enhanced instructions
Higher speed
Additional control register
Enhanced instructions
Higher speed
Eight 16-bit expanded registers, and one 8-bit control register, have been added.
Normal mode supports the same 64-kbyte address space as the H8/300 CPU. (ZTAT, mask
ROM, and ROMless versions only)
Advanced mode supports a maximum 16-Mbyte address space.
The addressing modes have been enhanced to make effective use of the 16-Mbyte address
space.
Addressing modes of bit-manipulation instructions have been enhanced.
Signed multiply and divide instructions have been added.
Two-bit shift instructions have been added.
Instructions for saving and restoring multiple registers have been added.
A test and set instruction has been added.
Basic instructions execute twice as fast.
One 8-bit control register has been added.
Addressing modes of bit-manipulation instructions have been enhanced.
Two-bit shift instructions have been added.
Instructions for saving and restoring multiple registers have been added.
A test and set instruction has been added.
Basic instructions execute twice as fast.
Differences from H8/300 CPU
Differences from H8/300H CPU
Rev. 4.00 Feb 15, 2006 page 23 of 900
REJ09B0291-0400
Section 2 CPU

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