DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 526

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 13 Smart Card Interface
Interrupt Operation: There are three interrupt sources in smart card interface mode: transmit
data empty interrupt (TXI) requests, transfer error interrupt (ERI) requests, and receive data full
interrupt (RXI) requests. The transmit end interrupt (TEI) request is not used in this mode.
When the TEND flag in SSR is set to 1, a TXI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated.
When any of flags ORER, PER, and ERS in SSR is set to 1, an ERI interrupt request is generated.
The relationship between the operating states and interrupt sources is shown in table 13.8.
Table 13.8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit
Mode
Receive
Mode
Data Transfer Operation by DTC: In smart card mode, as with the normal SCI, transfer can be
carried out using the DTC. In a transmit operation, the TDRE flag is also set to 1 at the same time
as the TEND flag in SSR, and a TXI interrupt is generated. If the TXI request is designated
beforehand as a DTC activation source, the DTC will be activated by the TXI request, and transfer
of the transmit data will be carried out. The TDRE and TEND flags are automatically cleared to 0
when data transfer is performed by the DTC. In the event of an error, the SCI retransmits the same
data automatically. However, the ERS flag is not cleared automatically when an error occurs, and
so the RIE bit should be set to 1 beforehand so that an ERI request will be generated in the event
of an error, and the ERS flag will be cleared.
When performing transfer using the DTC, it is essential to set and enable the DTC before carrying
out SCI setting. For details of the DTC setting procedures, see section 7, Data Transfer Controller.
In a receive operation, an RXI interrupt request is generated when the RDRF flag in SSR is set to
1. If the RXI request is designated beforehand as a DTC activation source, the DTC will be
activated by the RXI request, and transfer of the receive data will be carried out. The RDRF flag is
cleared to 0 automatically when data transfer is performed by the DTC. If an error occurs, an error
flag is set but the RDRF flag is not. The DTC is not activated, but instead, an ERI interrupt request
is sent to the CPU. Therefore, the error flag should be cleared.
Rev. 4.00 Feb 15, 2006 page 500 of 900
REJ09B0291-0400
Normal
operation
Error
Normal
operation
Error
Flag
TEND
ERS
RDRF
PER, ORER
Enable Bit
TIE
RIE
RIE
RIE
Interrupt Source
TXI
ERI
RXI
ERI
DTC Activation
Possible
Not possible
Possible
Not possible