DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 363

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Examples of Cascaded Operation: Figure 9.22 illustrates the operation when counting upon
TCNT2 overflow/underflow has been set for TCNT1, TGR1A and TGR2A have been designated
as input capture registers, and TIOC pin rising edge has been selected.
When a rising edge is input to the TIOCA1 and TIOCA2 pins simultaneously, the upper 16 bits of
the 32-bit data are transferred to TGR1A, and the lower 16 bits to TGR2A.
Figure 9.23 illustrates the operation when counting upon TCNT2 overflow/underflow has been set
for TCNT1, and phase counting mode has been designated for channel 2.
TCNT1 is incremented by TCNT2 overflow and decremented by TCNT2 underflow.
TCNT1
clock
TCNT1
TCNT2
clock
TCNT2
TIOCA1,
TIOCA2
TGR1A
TGR2A
TCLKA
TCLKB
TCNT2
TCNT1
H'FFFF
H'03A1
FFFD
Figure 9.22 Example of Cascaded Operation (1)
Figure 9.23 Example of Cascaded Operation (2)
0000
FFFE
FFFF
0000
H'0000
0001
Rev. 4.00 Feb 15, 2006 page 337 of 900
Section 9 16-Bit Timer Pulse Unit (TPU)
H'03A2
H'03A2
H'0000
0001
0002
0001
0000
REJ09B0291-0400
H'0001
FFFF
0000

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