DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 154
DF2345TE20
Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2345TE20V.pdf
(929 pages)
Specifications of DF2345TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20
HD64F2345TE20
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Section 5 Interrupt Controller
(2) Determination of Priority
The DTC activation source is selected in accordance with the default priority order, and is not
affected by mask or priority levels. See section 7.3.3, DTC Vector Table, for the respective
priorities.
(3) Operation Order
If the same interrupt is selected as a DTC activation source and a CPU interrupt source, the DTC
data transfer is performed first, followed by CPU interrupt exception handling.
If the same interrupt is selected as a DTC activation source or CPU interrupt source, operations are
performed for them independently according to their respective operating statuses and bus
mastership priorities.
Table 5.11 summarizes interrupt source selection and interrupt source clearance control according
to the settings of the DTCE bit of DTCEA to DTCEE in the DTC and the DISEL bit of MRB in
the DTC.
Table 5.11 Interrupt Source Selection and Clearing Control
DTC
DTCE
0
1
Legend:
X : The relevant bit cannot be used.
* : Don't care
(4) Notes on Use
SCI and A/D converter interrupt sources are cleared when the DTC reads or writes to the
prescribed register, and are not dependent upon the DISEL bit.
Rev. 4.00 Feb 15, 2006 page 128 of 900
REJ09B0291-0400
: The relevant interrupt is used. Interrupt source clearing is performed.
: The relevant interrupt is used. The interrupt source is not cleared.
(The CPU should clear the source flag in the interrupt handling routine.)
Settings
DISEL
*
0
1
Interrupt Source Selection/Clearing Control
DTC
X
CPU
X
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