DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 210

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 7 Data Transfer Controller
7.3.2
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 7.3 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Table 7.3
Figure 7.3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Rev. 4.00 Feb 15, 2006 page 184 of 900
REJ09B0291-0400
Activation
Source
Software
activation
Interrupt
activation
Activation Sources
Activation Source and DTCER Clearance
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The SWDTE bit is cleared to 0
The corresponding DTCER bit
remains set to 1
The activation source flag is
cleared to 0
When the DISEL Bit Is 1, or when
the Specified Number of
Transfers Have Ended
The SWDTE bit remains set to 1
An interrupt is issued to the CPU
The corresponding DTCER bit is cleared to 0
The activation source flag remains set to 1
A request is issued to the CPU for the
activation source interrupt