DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 425

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

11.2.2
TCSR is an 8-bit readable/writable * register. Its functions include selecting the clock source to be
input to TCNT, and the timer mode.
TCR is initialized to H'18 by a reset and in hardware standby mode. It is not initialized in software
standby mode.
Note: * The method for writing to TCSR is different from that for general registers to prevent
Bit 7—Overflow Flag (OVF): Indicates that TCNT has overflowed from H'FF to H'00, when in
interval timer mode. This flag cannot be set during watchdog timer operation.
Note:
Bit 6—Timer Mode Select (WT/IT IT IT IT): Selects whether the WDT is used as a watchdog timer or
interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request
(WOVI) when TCNT overflows. If used as a watchdog timer, the WDT generates the WDTOVF
signal * when TCNT overflows.
Note: * The WDTOVF pin function is not supported by the F-ZTAT version.
Bit 7
OVF
0
1
Bit
Initial value
R/W
Note: * Can only be written with 0 for flag clearing.
* When OVF is polled and the interval timer interrupt is disabled. OVF = 1 must be read
Timer Control/Status Register (TCSR)
inadvertent overwriting. For details see section 11.2.4, Notes on Register Access.
at least twice.
Description
[Clearing condition]
Cleared by reading TCSR when OVF = 1 * , then writing 0 to OVF
[Setting condition]
Set when TCNT overflows (changes from H'FF to H'00) in interval timer mode
:
:
:
R/(W) *
OVF
7
0
WT/IT
R/W
6
0
TME
R/W
5
0
—
—
4
1
Rev. 4.00 Feb 15, 2006 page 399 of 900
—
—
3
1
CKS2
R/W
Section 11 Watchdog Timer
2
0
CKS1
R/W
REJ09B0291-0400
1
0
(Initial value)
CKS0
R/W
0
0