DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 281

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Port D Data Register (PDDR)
PDDR is an 8-bit readable/writable register that stores output data for the port D pins (PD
PDDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port D Register (PORTD)
PORTD is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port D pins (PD
If a port D read is performed while PDDDR bits are set to 1, the PDDR values are read. If a port D
read is performed while PDDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTD contents are determined by the pin
states, as PDDDR and PDDR are initialized. PORTD retains its prior state after a manual reset,
and in software standby mode.
Bit
Initial value
R/W
Note: * Determined by state of pins PD
Bit
Initial value
R/W
:
:
:
:
:
:
PD7DR
R/W
PD7
—*
7
0
R
7
PD6DR
R/W
PD6
—*
6
0
R
6
7
to PD
PD5DR
R/W
PD5
—*
7
5
0
R
5
0
) must always be performed on PDDR.
to PD
PD4DR
0
.
R/W
PD4
—*
R
4
0
4
Rev. 4.00 Feb 15, 2006 page 255 of 900
PD3DR
R/W
PD3
—*
3
0
R
3
PD2DR
R/W
PD2
—*
R
2
0
2
PD1DR
Section 8 I/O Ports
REJ09B0291-0400
R/W
PD1
—*
R
1
0
1
PD0DR
7
R/W
PD0
to PD
—*
R
0
0
0
0
).