DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 169

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 6.3
6.3.3
The H8S/2345 Group memory interfaces comprise a basic bus interface that allows direct
connection of ROM, SRAM, and so on, and a burst ROM interface (for area 0 only) that allows
direct connection of burst ROM.
An area for which the basic bus interface is designated functions as normal space, and an area for
which the burst ROM interface is designated functions as burst ROM space.
6.3.4
The initial state of each area is basic bus interface, 3-state access space. The initial bus width is
selected according to the operating mode. The bus specifications described here cover basic items
only, and the sections on each memory interface (6.4, Basic Bus Interface and 6.5, Burst ROM
Interface) should be referred to for further details.
Area 0: Area 0 includes on-chip ROM, and in ROM-disabled expansion mode, all of area 0 is
external space. In ROM-enabled expansion mode, the space excluding on-chip ROM is external
space.
When area 0 external space is accessed, the CS0 signal can be output.
Either basic bus interface or burst ROM interface can be selected for area 0.
ABWCR
ABWn
0
1
Memory Interfaces
Advanced Mode
ASTCR
ASTn
0
1
0
1
Bus Specifications for Each Area (Basic Bus Interface)
Wn1
0
1
0
1
WCRH, WCRL
Wn0
0
1
0
1
0
1
0
1
16
8
Bus Width
Bus Specifications (Basic Bus Interface)
Rev. 4.00 Feb 15, 2006 page 143 of 900
Access States
2
3
2
3
Section 6 Bus Controller
REJ09B0291-0400
Program Wait
States
0
0
1
2
3
0
0
1
2
3

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