DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 919

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Port Name
Pin Name
PF
PF
PF
PF
PF
IRQ3
PF
IRQ2
PF
IRQ1
PF
IRQ0
PG
7
6
5
4
3
2
1
0
4
/
/AS
/RD
/HWR
/LWR/
/WAIT/
/BACK/
/BREQ/
/CS0
MCU
Operating
Mode
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 4, 5
2, 6
3, 7
Power-
On
Reset
Clock
output
T
H
T
T
T
T
T
T
T
H
T
T
Manual
Reset
[DDR = 0]
T
[DDR = 1]
Clock
output
kept
H *
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
[BRLE = 0]
kept
[BRLE = 1]
BACK
kept
[BRLE = 0]
kept
[BRLE = 1]
BREQ
kept
[DDR = 0]
T
[DDR = 1]
H *
kept
Hardware
Standby
Mode
T
T
T
T
T
T
T
T
T
T
T
T
Rev. 4.00 Feb 15, 2006 page 893 of 900
Software
Standby
Mode
[DDR = 0]
Input port
[DDR = 1]
H
[DDR = 0]
Input port
[DDR = 1]
H
[OPE = 0]
T
[OPE = 1]
H
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
[BRLE = 0]
kept
[BRLE = 1]
H
kept
[BRLE = 0]
kept
[BRLE = 1]
T
kept
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
kept
Bus
Release
State
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
T
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
L
kept
T
kept
kept
Appendix D Pin States
REJ09B0291-0400
Program
Execution
State
Sleep Mode
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
AS, RD,
HWR, LWR
I/O port
[WAITE = 0]
I/O port
[WAITE = 1]
WAIT
I/O port
[BRLE = 0]
I/O port
[BRLE = 1]
BACK
I/O port
[BRLE = 0]
I/O port
[BRLE = 1]
BREQ
I/O port
[DDR = 0]
Input port
[DDR = 1]
CS
I/O port
0