DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 616

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 ROM
17.11.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
Example in Which Flash Memory Block Area (EB1) is Overlapped
1. Set bits RAMS, RAM1, and RAM0 in RAMER to 1, 0, 1, to overlap part of RAM onto the
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
Rev. 4.00 Feb 15, 2006 page 590 of 900
REJ09B0291-0400
area (EB1) for which real-time programming is required.
2. A RAM area cannot be erased by execution of software in accordance with the erase
3. Block area EB0 includes the vector table. When performing RAM emulation, the
regardless of the value of RAM1 and RAM0 (emulation protection). In this state,
setting the P or E bit in flash memory control register 1 (FLMCR1) will not cause a
transition to program mode or erase mode. When actually programming a flash
memory area, the RAMS bit should be cleared to 0.
algorithm while flash memory emulation in RAM is being used.
vector table is needed by the overlap RAM.
H'000000
H'000400
H'000800
H'000C00
Figure 17.25 Example of RAM Overlap Operation
Flash memory
EB4 to EB9
EB0
EB1
EB2
EB3
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
H'FFEC00
H'FFEFFF

Related parts for DF2345TE20