DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 256

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 8 I/O Ports
Port 3 Register (PORT3)
PORT3 is an 8-bit read-only register that shows the pin states. Writing of output data for the port 3
pins (P3
Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.
If a port 3 read is performed while P3DDR bits are set to 1, the P3DR values are read. If a port 3
read is performed while P3DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT3 contents are determined by the pin
states, as P3DDR and P3DR are initialized. PORT3 retains its prior state after a manual reset, and
in software standby mode.
Port 3 Open Drain Control Register (P3ODR)
P3ODR is an 8-bit readable/writable register that controls the PMOS on/off status for each port 3
pin (P3
Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.
Setting a P3ODR bit to 1 makes the corresponding port 3 pin an NMOS open-drain output pin,
while clearing the bit to 0 makes the pin a CMOS output pin.
P3ODR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It
retains its prior state after a manual reset, and in software standby mode.
Rev. 4.00 Feb 15, 2006 page 230 of 900
REJ09B0291-0400
Bit
Initial value
R/W
Note: * Determined by state of pins P3
Bit
Initial value
R/W
5
5
to P3
to P3
0
:
:
:
:
:
:
).
0
) must always be performed on P3DR.
Undefined
Undefined
—
—
—
—
7
7
Undefined
Undefined
—
—
—
—
6
6
P35ODR
R/W
P35
—*
5
R
5
5
0
to P3
P34ODR
0
.
R/W
P34
—*
R
4
4
0
P33ODR
R/W
P33
—*
R
3
3
0
P32ODR
R/W
P32
—*
R
2
2
0
P31ODR
R/W
P31
—*
R
1
1
0
P30ODR
R/W
P30
—*
R
0
0
0