DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 135

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

5.3
Interrupt sources comprise external interrupts (NMI and IRQ7 to IRQ0) and internal interrupts (43
sources).
5.3.1
There are nine external interrupts: NMI and IRQ7 to IRQ0. Of these, NMI and IRQ2 to IRQ0 can
be used to restore the H8S/2345 Group from software standby mode.
NMI Interrupt: NMI is the highest-priority interrupt, and is always accepted by the CPU
regardless of the status of the CPU interrupt mask bits. The NMIEG bit in SYSCR can be used to
select whether an interrupt is requested at a rising edge or a falling edge on the NMI pin.
The vector number for NMI interrupt exception handling is 7.
IRQ7 to IRQ0 Interrupts: Interrupts IRQ7 to IRQ0 are requested by an input signal at pins
IRQ7 to IRQ0. Interrupts IRQ7 to IRQ0 have the following features:
A block diagram of interrupts IRQ7 to IRQ0 is shown in figure 5.2.
Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
edge, rising edge, or both edges, at pins IRQ7 to IRQ0.
Enabling or disabling of interrupt requests IRQ7 to IRQ0 can be selected with IER.
The interrupt priority level can be set with IPR.
The status of interrupt requests IRQ7 to IRQ0 is indicated in ISR. ISR flags can be cleared to
0 by software.
IRQn input
Note: n: 7 to 0
Interrupt Sources
External Interrupts
Figure 5.2 Block Diagram of Interrupts IRQ7 to IRQ0
IRQnSCA, IRQnSCB
detection circuit
Edge/level
Clear signal
S
R
IRQnF
Rev. 4.00 Feb 15, 2006 page 109 of 900
Q
IRQnE
Section 5 Interrupt Controller
REJ09B0291-0400
IRQn interrupt
request