DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 491
![MCU 5V 128K 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2345TE20
Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2345TE20V.pdf
(929 pages)
Specifications of DF2345TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20
HD64F2345TE20
Available stocks
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Company:
Part Number:
DF2345TE20V
Manufacturer:
Renesas
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Manufacturer:
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In serial transmission, the SCI operates as described below.
[1] The SCI monitors the TDRE flag in SSR, and if is 0, recognizes that data has been written to
[2] After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
[3] The SCI checks the TDRE flag at the timing for sending the MSB (bit 7).
[4] After completion of serial transmission, the SCK pin is fixed.
TDR, and transfers the data from TDR to TSR.
transmission. If the TIE bit is set to 1 at this time, a transmit data empty interrupt (TXI) is
generated.
When clock output mode has been set, the SCI outputs 8 serial clock pulses. When use of an
external clock has been specified, data is output synchronized with the input clock.
The serial transmit data is sent from the TxD pin starting with the LSB (bit 0) and ending with
the MSB (bit 7).
If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, and serial transmission
of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the MSB (bit 7) is sent, and the
TxD pin maintains its state.
If the TEIE bit in SCR is set to 1 at this time, a TEI interrupt request is generated.
Section 12 Serial Communication Interface (SCI)
Rev. 4.00 Feb 15, 2006 page 465 of 900
REJ09B0291-0400
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