DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 608

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 ROM
Rev. 4.00 Feb 15, 2006 page 582 of 900
REJ09B0291-0400
Increment address
NG
Write 32-byte data in RAM reprogram data
Store 32-byte program data in program
Transfer reprogram data to reprogram
H'FF dummy write to verify address
data area and reprogram data area
area consecutively to flash memory
Figure 17.21 Program/Program-Verify Flowchart
Reprogram data computation
Clear SWE bit in FLMCR1
Clear PSU bit in FLMCR2
Set SWE bit in FLMCR1
Clear PV bit in FLMCR1
Set PSU bit in FLMCR2
Clear P bit in FLMCR1
Set PV bit in FLMCR1
Set P bit in FLMCR1
End of programming
Read verify data
data verification?
Program data =
End of 32-byte
Disable WDT
Enable WDT
Wait ( ) s
Wait ( ) s
Wait ( ) s
Wait (x) s
Wait (y) s
Wait (z) s
Wait ( ) s
Wait ( ) s
verify data?
OK
data area
m = 0?
m = 0
n = 1
Start
OK
OK
*3
NG
NG
*5
*4
*1
*5
Start of programming
*5
End of programming
*5
*5
*5
*5
*2
*3
*4
*5
m = 1
Notes: 1. Data transfer is performed by byte transfer. The lower
Clear SWE bit in FLMCR1
Programming failure
Program
Data
Note: The memory erased state is 1. Programming is
0
0
1
1
2. Verify data is read in 16-bit (word) units.
3. Even bits for which programming has been completed in a 32-byte
4. An area for storing program data (32 bytes) and reprogram data
5. The values of x, y, z, , , , , , and N are shown in section
8 bits of the first address written to must be H'00, H'20, H'40,
H'60, H'80, H'A0, H'C0, or H'E0. A 32-byte data transfer
must be performed even if writing fewer than 32 bytes;
in this case, H'FF data must be written to the extra addresses.
programming loop will be subjected to additional programming if
the subsequent verify operation fails.
(32 bytes) must be provided in RAM. The contents of the latter
are rewritten as programming progresses.
20.1.6, Flash Memory Characteristics.
n
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
performed on 0 reprogram data.
N?
0
1
0
1
Verify
Data
OK
*5
Reprogram
Data
1
0
1
1
NG
n
n + 1
Comments
Programmed bits are
not reprogrammed
Programming incomplete;
reprogram
Still in erased state;
no action
Reprogram data storage
Program data storage
area (32 bytes)
area (32 bytes)
RAM

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