DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 489

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
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Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Data Transfer Operations
SCI initialization (clocked synchronous mode): Before transmitting and receiving data, you
should first clear the TE and RE bits in SCR to 0, then initialize the SCI as described below.
When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared to
0 before making the change using the following procedure. When the TE bit is cleared to 0, the
TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not change the
contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.
Figure 12.15 shows a sample SCI initialization flowchart.
Note: When transmitting and receiving data simultaneously, the TE and RE bits should be
Set TE and RE bits in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
Set data transfer format in
cleared to 0 and then set to 1 at the same time.
1-bit interval elapsed?
Set value in BRR
Start initialization
SMR and SCMR
<Transfer start>
(TE, RE bits 0)
Figure 12.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
Section 12 Serial Communication Interface (SCI)
[1] Set the clock selection in SCR. Be sure
[2] Set the data transfer format in SMR
[3] Write a value corresponding to the bit
[4] Wait at least one bit interval, then set
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
and SCMR.
rate to BRR. Not necessary if an
external clock is used.
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used.
Rev. 4.00 Feb 15, 2006 page 463 of 900
REJ09B0291-0400

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