DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 159

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

6.2.2
ASTCR is an 8-bit readable/writable register that designates each area as either a 2-state access
space or a 3-state access space.
ASTCR sets the number of access states for the external memory space. The number of access
states for on-chip memory and internal I/O registers is fixed regardless of the settings in ASTCR.
In normal mode * , the settings of bits AST7 to AST1 have no effect on operation.
ASTCR is initialized to H'FF by a power-on reset and in hardware standby mode. It is not
initialized by a manual reset or in software standby mode.
Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the
corresponding area is to be designated as a 2-state access space or a 3-state access space. In
normal mode * , only part of area 0 is enabled, and the AST0 bit selects whether external space is
to be designated for 2-state access or 3-state access.
Wait state insertion is enabled or disabled at the same time.
Note: * ZTAT, mask ROM, and ROMless versions only.
Bit n
ASTn
0
1
Bit
Initial value
R/W
Access State Control Register (ASTCR)
Description
Area n is designated for 2-state access
Wait state insertion in area n external space is disabled
Area n is designated for 3-state access
Wait state insertion in area n external space is enabled
:
:
:
AST7
R/W
7
1
AST6
R/W
6
1
AST5
R/W
5
1
AST4
R/W
4
1
Rev. 4.00 Feb 15, 2006 page 133 of 900
AST3
R/W
3
1
AST2
R/W
2
1
Section 6 Bus Controller
AST1
REJ09B0291-0400
R/W
1
1
(Initial value)
(n = 7 to 0)
AST0
R/W
0
1