DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 523

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

(1) Data write
(2) Transfer from
(3) Serial data output
Note: When the ERS flag is set, it should be cleared until transfer of the last bit (D7 in LSB-first
I/O data
TXI
(TEND interrupt)
In case of normal transmission: TEND flag is set
In case of transmit error:
TDR to TSR
Legend:
Ds
D0 to D7 : Data bits
Dp
DE
When GM = 0
When GM = 1
transmission, D0 in MSB-first transmission) of the next transfer data to be transmitted has
been completed.
Figure 13.5 Relation between Transmit Operation and Internal Registers
Figure 13.6 TEND Flag Generation Timing in Transmission Operation
: Start bit
: Parity bit
: Error signal
Ds
Data 1
Data 1
Data 1
TDR
D0 D1 D2 D3 D4 D5 D6 D7 Dp
ERS flag is set
Steps (2) and (3) above are repeated until the TEND flag is set
(shift register)
11.0etu
Data 1
TSR
12.5etu
Rev. 4.00 Feb 15, 2006 page 497 of 900
; Data remains in TDR
Data 1
Section 13 Smart Card Interface
I/O signal line output
Guard
time
DE
REJ09B0291-0400