DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 499

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Thus the reception margin in asynchronous mode is given by formula (1) below.
Where M : Reception margin (%)
Assuming values of F = 0 and D = 0.5 in formula (1), a reception margin of 46.875% is given by
formula (2) below.
When D = 0.5 and F = 0,
However, this is only the computed value, and a margin of 20% to 30% should be allowed in
system design.
Internal basic
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
N : Ratio of bit rate to clock (N = 16)
D : Clock duty (D = 0 to 1.0)
L : Frame length (L = 9 to 12)
F : Absolute value of clock rate deviation
M = (0.5 –
M = (0.5 –
= 46.875%
Figure 12.21 Receive Data Sampling Timing in Asynchronous Mode
0
2
2N
1
1
8 clocks
Start bit
16
) – (L – 0.5) F –
)
100%
16 clocks
7
D – 0.5
N
Section 12 Serial Communication Interface (SCI)
15 0
(1 + F)
Rev. 4.00 Feb 15, 2006 page 473 of 900
D0
100%
. . . . . . . . Formula (1)
. . . . . . . . Formula (2)
7
REJ09B0291-0400
15 0
D1

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