MC912DG128A Motorola, MC912DG128A Datasheet - Page 104
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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EEPROM
MC68HC912DT128A Rev 2.0
104
A steady internal self-time clock is required to provide accurate counts
to meet EEPROM program/erase requirements. This clock is generated
via by a programmable 10-bit prescaler register. Automatic
program/erase termination is also provided.
In ordinary situations, with crystal operating properly, the steady internal
self-time clock is derived from the input clock source (EXTALi). The
divider value is as in EEDIVH:EEDIVL. In limp-home mode, where the
oscillator has malfunctioned or is unavailable, the self-time clock is
derived from the PLL at f
divider value of $0023. Program/erase operation is not guaranteed in
limp-home mode. The clock switching function is only applicable for
permanent loss of crystal condition, so the program/erase will also not
be guaranteed when the loss of crystal condition is intermittent.
It is strongly recommended that the clock monitor is enabled to ensure
that the program/erase operation will be shutdown in the event of loss of
crystal with a clock monitor reset, or switch to a limp-home mode clock.
This will prevent unnecessary stress on the emulated EEPROM during
oscillator failure.
EEPROM
VCOMIN
(nominally 1 MHz), with a predefined
MOTOROLA
4-eeprom
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