MC912DG128A Motorola, MC912DG128A Datasheet - Page 294

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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Transmit Buffer Priority Registers (TBPR)
Programmer’s Model of Control Registers
Overview
MSCAN Controller
MC68HC912DT128A Rev 2.0
294
1. x is 5, 6, or 7 depending on which buffer Tx0, Tx1, or Tx2 respectively.
TBPR
$01xD
RESET
(1)
W
R
NOTE:
PRIO7
BIT 7
-
PRIO7 – PRIO0 — Local Priority
To ensure data integrity, no registers of the transmit buffers shall be
written while the associated TXE flag is cleared.
To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
The programmer’s model has been laid out for maximum simplicity and
efficiency.
PRIO6
BIT 6
This field defines the local priority of the associated message buffer.
The local priority is used for the internal prioritizing process of the
msCAN12 and is defined to be highest for the smallest binary number.
The msCAN12 implements the following internal priorization
mechanism:
-
All transmission buffers with a cleared TXE flag participate in the
priorisation right before the SOF (Start of Frame) is sent.
The transmission buffer with the lowest local priority field wins the
priorisation.
In case of more than one buffer having the same lowest priority the
message buffer with the lower index number wins.
PRIO5
BIT 5
-
MSCAN Controller
PRIO4
BIT 4
-
PRIO3
BIT 3
-
PRIO2
BIT 2
-
PRIO1
BIT 1
-
MOTOROLA
26-mscan12
PRIO0
BIT 0
-

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