MC912DG128A Motorola, MC912DG128A Datasheet - Page 147

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

STOP exit without
Limp Home mode,
clock monitor
disabled
Executing the
STOP instruction
without Limp
Home mode,
clock monitor
enabled
STOP exit in Limp
Home mode with
Delay
13-clock
MOTOROLA
NOTE:
(NOLHM=1, CME=0, DLY=X)
If Limp home mode is disabled (V
CME (or FCME) bit is cleared, the MCU goes into STOP mode when a
STOP instruction is executed.
If EXTALi clock is present then exit from STOP will occur normally using
this clock. Under this condition, DLY should always be set to allow the
crystal to stabilise and minimise the risk of code runaway. With DLY=1
execution resumes after a delay of 4096 XCLK cycles.
The external clock signal should stabilise within the 4096 reset counter
cycles. Use of DLY=0 is not recommended due to this requirement.
(NOLHM=1, CME=1, DLY=X)
If the NOLHM bit and the CME (or FCME) bits are set, a clock monitor
failure is detected when a STOP instruction is executed and the MCU
resets via the clock monitor reset vector.
(NOLHM=0, CME=X, DLY=1)
If the NOLHM bit is cleared, then the CME (or FCME) bit is masked when
a STOP instruction is executed to prevent a clock monitor failure. When
coming out of STOP mode, the MCU goes into limp-home mode where
CME and FCME signals are asserted.
When using a crystal oscillator, a normal STOP exit sequence requires
the DLY bit to be set to allow for the crystal stabilization period.
With the 13-stage counter clocked by the VCO (at f
delay of 4096 XCLK cycles at the limp-home frequency, if the clock
monitor indicates the presence of an external clock, the limp-home mode
is de-asserted and the MCU exits STOP normally using EXTALi clock.
Where the crystal start-up time is longer than the initial count of 4096
XCLK cycles, or in the absence of an external clock, the MCU recovers
from STOP following the 4096 count in limp-home mode with both the
LHOME flag set and the LHIF limp-home interrupt request set to indicate
Clock Functions
DDPLL
Limp-Home and Fast STOP Recovery modes
=V
SS
or NOLHM bit set) and the
MC68HC912DT128A Rev 2.0
VCOMIN
Clock Functions
), following a
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