MC912DG128A Motorola, MC912DG128A Datasheet - Page 239

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

SS Output
17-msi
MOTOROLA
SCK (CPOL=0)
SCK (CPOL=1)
SAMPLE I
(MOSI/MISO)
CHANGE O
CHANGE O
SEL SS (O)
(Master only)
SEL SS (I)
(MOSI pin)
(MISO pin)
MSB first (LSBF=0):
LSB first (LSBF=1):
Transfer
t
L
Available in master mode only, SS output is enabled with the SSOE bit
in the SP0CR1 register if the corresponding DDRS is set. The SS output
pin will be connected to the SS input pin of the external slave device. The
SS output automatically goes low for each transmission to select the
external device and it goes high during each idling state to deselect
external devices.
Figure 35 SPI Clock Format 1 (CPHA = 1)
MSB
LSB
DDRS7
Begin
Bit 6
Bit 1
0
0
1
1
Multiple Serial Interface
Bit 5
Bit 2
SSOE
0
1
0
1
Table 35 SS Output Selection
Bit 4
Bit 3
SS Input with MODF Feature
General-Purpose Output
Bit 3
Bit 4
Master Mode
SS Output
Reserved
Bit 2
Bit 5
Bit 1
Bit 6
End
Serial Peripheral Interface (SPI)
MC68HC912DT128A Rev 2.0
MSB
LSB
Multiple Serial Interface
t
T
Slave Mode
Minimum 1/2 SCK
SS Input
SS Input
SS Input
SS Input
t
HC12 SPI CLOCK FORM 1
I
for t
T
t
L
, t
l
, t
L
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