MC912DG128A Motorola, MC912DG128A Datasheet - Page 231

no-image

MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912DG128ACPV
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128ACPV
Manufacturer:
FREE
Quantity:
20 000
Part Number:
MC912DG128ACPV 5K91D
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC912DG128ACPVE
Manufacturer:
MICREL
Quantity:
9 982
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 200
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 970
Part Number:
MC912DG128ACPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128ACPVE
Manufacturer:
FREESCALE
Quantity:
1 970
Part Number:
MC912DG128ACPVER
Manufacturer:
STM
Quantity:
1 244
Part Number:
MC912DG128ACPVER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128AMPV
Manufacturer:
AD
Quantity:
16
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
2 902
Part Number:
MC912DG128AVPVE
Quantity:
36
9-msi
MOTOROLA
RIE — Receiver Interrupt Enable
ILIE — Idle Line Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
RWU — Receiver Wake-Up Control
SBK — Send Break
As long as SBK remains set the transmitter will send zeros. When
SBK is changed to zero, the current frame of all zeros is finished
before the TxD line goes to the idle state. If SBK is toggled on and off,
the transmitter will send only 10 (or 11) zeros and then revert to mark
idle or sending data.
0 = RDRF and OR interrupts disabled, RAF interrupt in WAIT mode
1 = SCI interrupt will be requested whenever the RDRF or OR
0 = IDLE interrupts disabled
1 = SCI interrupt will be requested whenever the IDLE status flag
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (Port S bit 1/bit
0 = Receiver disabled
1 = Enables the SCI receive circuitry.
0 = Normal SCI Receiver
1 = Enables the wake-up function and inhibits further receiver
0 = Break generator off
1 = Generate a break code (at least 10 or 11 contiguous zeros).
disabled
status flag is set, or when RAF is set while in WAIT mode with
VDDPLL high.
is set.
3) is dedicated to the transmitter. The TE bit can be used to
queue an idle preamble.
interrupts. Normally hardware wakes the receiver by
automatically clearing this bit.
Multiple Serial Interface
Serial Communication Interface (SCI)
MC68HC912DT128A Rev 2.0
Multiple Serial Interface
231

Related parts for MC912DG128A