MC912DG128A Motorola, MC912DG128A Datasheet - Page 309

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

msCAN12 Port CAN Control Register (PCTLCAN)
41-mscan12
MOTOROLA
PCTLCAN
$013D
RESET
W
R
NOTE:
Bit 7
0
0
AM7 – AM0 — Acceptance Mask Bits
The CIDMR0–7 registers can only be written if the SFTRES bit in
CMCR0 is set.
The following bits control pins 7 through 2 of Port CAN when they are
implemented externally.
PUPCAN — Pull-Up Enable Port CAN
RDPCAN — Reduced Drive Port CAN
If a particular bit in this register is cleared this indicates that the
corresponding bit in the identifier acceptance register must be the
same as its identifier bit, before a match will be detected. The
message will be accepted if all such bits match. If a bit is set, it
indicates that the state of the corresponding bit in the identifier
acceptance register will not affect whether or not the message is
accepted.
6
0
0
0 = Match corresponding acceptance code register and identifier bits.
1 = Ignore corresponding acceptance code register bit.
0 = Pull mode disabled for Port CAN.
1 = Pull mode enabled for Port CAN.
0 = Reduced drive disabled for Port CAN.
1 = Reduced drive enabled for Port CAN.
5
0
0
MSCAN Controller
4
0
0
3
0
0
Programmer’s Model of Control Registers
2
0
0
MC68HC912DT128A Rev 2.0
PUPCAN
1
0
MSCAN Controller
RDPCAN
Bit 0
0
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