MC912DG128A Motorola, MC912DG128A Datasheet - Page 298

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

msCAN12 Bus Timing Register 1 (CBTR1)
MSCAN Controller
MC68HC912DT128A Rev 2.0
298
CBTR1
$0103
RESET
W
R
NOTE:
SAMP
Bit 7
0
BRP5 – BRP0 — Baud Rate Prescaler
The CBTR0 register can only be written if the SFTRES bit in CMCR0 is
set.
SAMP — Sampling
TSEG22
These bits determine the time quanta (Tq) clock, which is used to
build up the individual bit timing, according to
This bit determines the number of samples of the serial bus to be
taken per bit time. If set three samples per bit are taken, the regular
one (sample point) and two preceding samples, using a majority rule.
For higher bit rates SAMP should be cleared, which means that only
one sample will be taken per bit.
BRP5
6
0
0
0
0
0
1
:
:
SJW1
0
0
1
1
BRP4
TSEG21
0
0
0
0
1
:
:
5
0
Table 41 Synchronization jump width
MSCAN Controller
BRP3
Table 42 Baud rate prescaler
0
0
0
0
1
:
:
TSEG20
4
0
SJW0
0
1
0
1
BRP2
0
0
0
0
1
:
:
TSEG13
3
0
BRP1
0
0
1
1
1
:
:
Synchronization jump width
TSEG12
BRP0
2
0
0
1
0
1
1
:
:
2 Tq clock cycles
3 Tq clock cycles
4 Tq clock cycles
1 Tq clock cycle
Table
Prescaler value (P)
TSEG11
42.
1
0
64
1
2
3
4
:
:
MOTOROLA
TSEG10
30-mscan12
Bit 0
0