MC912DG128A Motorola, MC912DG128A Datasheet - Page 225

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Data Format
3-msi
MOTOROLA
INTERNAL
LOGIC
TO
DATA BUS
Figure 32 Serial Communications Interface Block Diagram
SCxBD/SELECT
DIVIDER
MCLK
M68HC12 products, this feature is active only in WAIT mode and is
disabled when VDDPLL supply is at V
The serial data format requires the following conditions:
•
DETECT
PARITY
SCxCR1/SCI CTL 1
BAUD RATE
An idle-line in the high state before transmission or reception of a
message.
CLOCK
Tx Baud Rate
Rx Baud Rate
INT REQUEST LOGIC
SCxSR1/INT STATUS
Multiple Serial Interface
SCxCR1/SCI CTL 1
DATA RECOVERY
INT REQUEST LOGIC
GENERATOR
PARITY
WAKE-UP LOGIC
MSB
MSB
TxD BUFFER/SCxDRL
TxD BUFFER/SCxDRL
SCxSR1/INT STATUS
10-11 BIT SHIFT REG
10-11 Bit SHIFT REG
SCxCR2/SCI CTL 2
SCxCR2/SCI CTL 2
SCI TRANSMITTER
TxMTR CONTROL
SCI RECEIVER
SS
Serial Communication Interface (SCI)
level.
LSB
LSB
MC68HC912DT128A Rev 2.0
Multiple Serial Interface
HC12A4 SCI BLOCK
TxD
RxD
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