MC912DG128A Motorola, MC912DG128A Datasheet - Page 106

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

EEMCR — EEPROM Module Configuration
EEPROM
MC68HC912DT128A Rev 2.0
106
1. Bits 4 and 5 have test functions and should not be programmed.
2. Loaded from SHADOW word.
RESET:
NOBDML
Bit 7
—
NOTE:
NOTE:
(2)
NOSHW
—
6
(2)
INT[A] denotes the round down integer value of A. Program/erase cycles
will not be activated when EEDIV = 0.
Bits[7:4] are loaded at reset from the EEPROM SHADOW word.
The bits 5 and 4 are reserved for test purposes. These locations in
SHADOW word should not be programmed otherwise some locations of
regular EEPROM array will not be more visible.
NOBDML — Background Debug Mode Lockout Disable
NOSHW — SHADOW Word Disable
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
0 = The SHADOW word is enabled and accessible at address
1 = Regular EEPROM array at address $0FC0-$0FC1.
Osc Freq.
—
500 Khz
250 Khz
RESERVED
16 Mhz
5
8 Mhz
4 Mhz
2 Mhz
1 Mhz
(2)
$0FC0-$0FC1.
—
(1)
4
(2)
EEPROM
Table 17 EEDIV Selection
Osc Period
62.5ns
125ns
250ns
500ns
1 s
2 s
4 s
3
1
1
EESWAI
Divide Factor
2
1
560
280
140
70
35
18
9
PROTLCK
1
0
DMY
Bit 0
EEDIV
$008C
$0230
$0118
$0046
$0023
$0012
$0009
0
MOTOROLA
$00F0
6-eeprom