MC912DG128A Motorola, MC912DG128A Datasheet - Page 89

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

7-bus
MOTOROLA
PIPOE — Pipe Status Signal Output Enable
NECLK — No External E Clock
LSTRE — Low Strobe (LSTRB) Enable
Normal: write once; Special: write anytime EXCEPT the first time.
Read anytime.
Normal single chip: write once; special single chip: write anytime; all
other modes: write never.
Read anytime. In peripheral mode, E is an input and in all other
modes, E is an output.
Normal: write once; Special: write anytime EXCEPT the first time.
Read anytime. This bit has no effect in single-chip modes or normal
expanded narrow mode.
LSTRB is used during external writes. After reset in normal expanded
mode, LSTRB is disabled. If needed, it should be enabled before
external writes. External reads do not normally need LSTRB because
all 16 data bits can be driven even if the MCU only needs 8 bits of
data.
1 = PE6 is a test signal output from the CGM module (no effect in
0 = PE[6:5] are general-purpose I/O (if CGMTE = 1, PE6 is a test
1 = PE[6:5] are outputs and indicate the state of the instruction
0 = PE4 is the external E-clock pin subject to the following
1 = PE4 is a general-purpose I/O pin.
0 = PE3 is a general-purpose I/O pin.
1 = PE3 is configured as the LSTRB bus-control output, provided
single chip or normal expanded modes). PIPOE = 1 overrides
this function and forces PE6 to be a pipe status output signal.
output signal from the CGM module).
queue (only effective in expanded modes).
limitation: In single-chip modes, to get an E clock output signal,
it is necessary to have ESTR = 0 in addition to NECLK = 0. A
16-bit write to PEAR and MODE registers can configure all
three bits in one operation.
the MCU is not in single chip or normal expanded narrow
modes.
Bus Control and Input/Output
MC68HC912DT128A Rev 2.0
Bus Control and Input/Output
Registers
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