MC912DG128A Motorola, MC912DG128A Datasheet - Page 96
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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FEECTL — Flash EEPROM Control Register
Flash EEPROM
MC68HC912DT128A Rev 2.0
96
RESET:
Bit 7
0
0
6
0
0
FEESWAI — Flash EEPROM Stop in Wait Control
HVEN — High-Voltage Enable
ERAS — Erase Control
PGM — Program Control
This register controls the programming and erasure of the Flash
EEPROM.
This bit enables the charge pump to supply high voltages for program
and erase operations in the array. HVEN can only be set if either PGM
or ERAS are set and the proper sequence for program or erase is
followed.
This bit configures the memory for erase operation. ERAS is
interlocked with the PGM bit such that both bits cannot be equal to 1
or set to1 at the same time.
This bit configures the memory for program operation. PGM is
interlocked with the ERAS bit such that both bits cannot be equal to 1
or set to1 at the same time.
0 = Disables high voltage to array and charge pump off
1 = Enables high voltage to array and charge pump on
0 = Erase operation is not selected.
1 = Erase operation selected.
0 = Program operation is not selected.
1 = Program operation selected.
0 = Do not halt Flash EEPROM clock when the part is in wait
1 = Halt Flash EEPROM clock when the part is in wait mode.
5
0
0
mode.
FEESWAI
Flash EEPROM
4
0
HVEN
3
0
2
0
0
ERAS
1
0
PGM
Bit 0
0
MOTOROLA
$00F7
4-flash
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