MC912DG128A Motorola, MC912DG128A Datasheet - Page 63

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

1-modes
MOTOROLA
Contents
Introduction
Operating Modes
BKGD
1
1
1
1
0
0
MODB
0
0
1
1
0
0
MODA
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Operating Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Background Debug Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Eight possible operating modes determine the operating configuration of
the MC68HC912DT128A. Each mode has an associated default
memory map and external bus configuration.
The operating mode out of reset is determined by the states of the
BKGD, MODB, and MODA pins during reset.
The SMODN, MODB, and MODA bits in the MODE register show current
operating mode and provide limited mode switching during operation.
The states of the BKGD, MODB, and MODA pins are latched into these
bits on the rising edge of the reset signal.
0
1
0
1
0
1
Reserved (Forced to Peripheral)
Table 9 Mode Selection
Normal Expanded Narrow
Special Expanded Narrow
Normal Expanded Wide
Normal Single Chip
Special Single Chip
Operating Modes
Mode
ADDR/DATA
ADDR/DATA
ADDR/DATA
Operating Modes
G.P. I/O
G.P. I/O
Port A
—
MC68HC912DT128A Rev 2.0
Operating Modes
ADDR/DATA
G.P. I/O
G.P. I/O
Port B
ADDR
ADDR
—
63