MC912DG128A Motorola, MC912DG128A Datasheet - Page 237

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

15-msi
MOTOROLA
SP0BR SPI BAUD RATE REGISTER
2
4
INTERRUPT
REQUEST
SPI
8
(SAME AS E RATE)
MCU P CLOCK
16
SELECT
DIVIDER
32
SP0SR SPI STATUS REGISTER
Figure 33 Serial Peripheral Interface Block Diagram
SPI CONTROL
64
A clock phase control bit (CPHA) and a clock polarity control bit (CPOL)
in the SP0CR1 register select one of four possible clock formats to be
used by the SPI system. The CPOL bit simply selects non-inverted or
inverted clock. The CPHA bit is used to accommodate two
fundamentally different protocols by shifting the clock by one half cycle
or no phase shift.
128
256
Multiple Serial Interface
SP0DR SPI DATA REGISTER
SHIFT CONTROL LOGIC
8-BIT SHIFT REGISTER
INTERNAL BUS
READ DATA BUFFER
MSTR
SPE
SP0CR1 SPI CONTROL REGISTER 1
CLOCK
LOGIC
CLOCK
SWOM
LSBF
SP0CR2 SPI CONTROL REGISTER 2
Serial Peripheral Interface (SPI)
MC68HC912DT128A Rev 2.0
CONTROL
S
M
M
S
S
M
LOGIC
PIN
Multiple Serial Interface
MISO
MOSI
SCK
PS4
PS5
PS6
PS7
SS
HC12 SPI BLOCK
237